Referring to FIG. 1, a conventional ILFD includes a signal injection circuit 11, an oscillating circuit 12, and two buffer circuits 13, 14. The signal injection circuit 11 receives an input voltage signal (Vin). The oscillating circuit 12 performs frequency division on the input voltage signal (Vin) to generate a differential oscillating signal pair, which has a frequency being one-Nth a frequency of the input voltage signal (Vin), where N is a positive integer greater than or equal to two. The buffer circuits 13, 14 cooperatively perform buffering on the differential oscillating signal pair to generate a differential output signal pair (vo1, vo2).
However, the conventional ILFD has a narrow frequency locking range, so in a case that the frequency lock range deviates because of variation in process or temperature, the frequency of the input voltage signal (Vin) may fall outside the deviated frequency locking range. As a result, the conventional ILFD may fail to perform frequency division on the input voltage signal (Vin).